Since early implementations of SPADs and CMOS-based SPADS, these devices have established themselves as the detectors of choice in multiple time-correlated imaging methods, such as fluorescence lifetime imaging and 3D imaging. For SPADS reference is directed to S. Cova et al., “A Semiconductor Detector for Measuring Ultraweak Fluorescence Decays with 70 ps FWHM Resolution,” IEEE Journal of Quantum Electronics, vol. 10(4), pp. 630-634, 1983; and for CMOS-based SPADs reference is directed to Rochas et al., “Single Photon Detector Fabricated in a Complementary Metal-Oxide-Semiconductor High-Voltage Technology,” Review of Scientific Instruments, vol. 74(7), pp. 3263-3270, 2003. One of the major challenges still remaining is the formation of a large array of SPADs. This implies the reduction of pitch and increased scalability of detectors.
In addition, to reach picosecond time resolutions it is generally commonplace to perform time discrimination off-chip. With thousands or millions of single photon detectors, the bottleneck becomes readout, unless timing electronics are integrated on-chip. Reference is directed to C. Niclass et al., “Towards a 3D Camera Based on Single Photon Avalanche Diodes,” IEEE Journal of Selected Topics in Quantum Electronics, 10(4), 796-802, 2004. To allow for sufficient electronics to be integrated on a pixel or array level, the approach is either designing SPADs in deep-submicron CMOS technology or using 3D packaging technology.
The core of the SPAD includes a p-n junction biased above its breakdown voltage, thus operating in the Geiger mode. In this region of operation, free carriers such as photo generated electron hole pairs, can trigger an avalanche breakdown by impact ionization. To avoid premature edge breakdown a guard ring has been implemented to limit the electric field at the edges of the junction.
As disclosed in Cohen et al., “Fully Optimized Cu Based Process with Dedicated Cavity Etch for 1.75 μm and 145 μm Pixel Pitch CMOS Image Sensors,” IEDM, 2006, the use of shallow trench isolation (STI) as a guard ring yields a significant improvement in fill-factor. However, it is well known that STI dramatically increases the density of deep-level carrier generation centers at its interface. Thus, if the active region of the SPAD is in direct contact with the STI as in Finkelstein et al. “STI-Bounded Single-Photon Avalanche Diode in a Deep-Submicrometer CMOS Technology,” IEEE Electron Device Letters, vol. 27 (11), pp. 887-889, 2006, the injection of free carriers into the sensitive region of the detector results in a very high count rate, known as the dark count rate (DCR), which is unrelated to photo-detection events.